1. Field of the Invention
The invention relates to a method for fabricating semiconductor device, and more particularly to a method for forming a deep trench isolation structure in a substrate and a trap rich isolation structure in the substrate and surrounding the deep trench isolation structure.
2. Description of the Prior Art
In radio frequency (RF) integrated circuit application, such as RF switch device or power amplifier device, performance is suffered from “parasitic surface charge” issue, which in turn generates harmonic effect. There are several wafer process technologies available for solving the issue such as using semiconductor-on-insulator (SOI) wafer to isolate the charges from the high resistivity wafer substrate. However, as the RF switch goes high frequency, it is more sensitive to RF harmonic effect induced by the parasitic surface charges. The problem needs to be solved.